diff -urN linux.cvs/arch/mips/Makefile linux.pdh/arch/mips/Makefile --- linux.cvs/arch/mips/Makefile 2004-04-17 08:45:31.000000000 +0100 +++ linux.pdh/arch/mips/Makefile 2004-05-18 23:53:39.000000000 +0100 @@ -306,6 +306,7 @@ # Cobalt Server # core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ +cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/cobalt load-$(CONFIG_MIPS_COBALT) += 0x80080000 # diff -urN linux.cvs/arch/mips/cobalt/int-handler.S linux.pdh/arch/mips/cobalt/int-handler.S --- linux.cvs/arch/mips/cobalt/int-handler.S 2003-11-13 14:30:45.000000000 +0000 +++ linux.pdh/arch/mips/cobalt/int-handler.S 2004-05-18 23:53:39.000000000 +0100 @@ -19,7 +19,7 @@ CLI la ra, ret_from_irq - move a1, sp + move a0, sp j cobalt_irq END(cobalt_handle_int) diff -urN linux.cvs/arch/mips/cobalt/irq.c linux.pdh/arch/mips/cobalt/irq.c --- linux.cvs/arch/mips/cobalt/irq.c 2003-11-13 14:30:45.000000000 +0000 +++ linux.pdh/arch/mips/cobalt/irq.c 2004-05-18 23:54:14.000000000 +0100 @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -25,8 +26,8 @@ * the CPU interrupt lines, and ones that come in on the via chip. The CPU * mappings are: * - * 16, - Software interrupt 0 (unused) IE_SW0 - * 17 - Software interrupt 1 (unused) IE_SW0 + * 16 - Software interrupt 0 (unused) IE_SW0 + * 17 - Software interrupt 1 (unused) IE_SW1 * 18 - Galileo chip (timer) IE_IRQ0 * 19 - Tulip 0 + NCR SCSI IE_IRQ1 * 20 - Tulip 1 IE_IRQ2 @@ -82,11 +83,15 @@ } if (pending & CAUSEF_IP7) { /* int 23 */ - do_IRQ(COBALT_QUBE_SLOT_IRQ, regs); + do_IRQ(23, regs); return; } } +static struct irqaction irq_via = { + no_action, 0, 0, "cascade", NULL, NULL +}; + void __init init_IRQ(void) { set_except_vector(0, cobalt_handle_int); @@ -99,4 +104,6 @@ * (except IE4, we already masked those at VIA level) */ change_c0_status(ST0_IM, IE_IRQ4); + + setup_irq(COBALT_VIA_IRQ, &irq_via); } diff -urN linux.cvs/arch/mips/cobalt/setup.c linux.pdh/arch/mips/cobalt/setup.c --- linux.cvs/arch/mips/cobalt/setup.c 2004-01-28 22:16:39.000000000 +0000 +++ linux.pdh/arch/mips/cobalt/setup.c 2004-05-18 23:53:39.000000000 +0100 @@ -31,27 +31,25 @@ int cobalt_board_id; -static char my_cmdline[CL_SIZE] = { - "console=ttyS0,115200 " -#ifdef CONFIG_IP_PNP - "ip=on " -#endif -#ifdef CONFIG_ROOT_NFS - "root=/dev/nfs " -#else - "root=/dev/hda1 " -#endif - }; - const char *get_system_type(void) { + switch (cobalt_board_id) { + case COBALT_BRD_ID_QUBE1: + return "Cobalt Qube"; + case COBALT_BRD_ID_RAQ1: + return "Cobalt RaQ"; + case COBALT_BRD_ID_QUBE2: + return "Cobalt Qube2"; + case COBALT_BRD_ID_RAQ2: + return "Cobalt RaQ2"; + } return "MIPS Cobalt"; } static void __init cobalt_timer_setup(struct irqaction *irq) { - /* Load timer value for 150 Hz */ - GALILEO_OUTL(500000, GT_TC0_OFS); + /* Load timer value for 1KHz */ + GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS); /* Register our timer interrupt */ setup_irq(COBALT_TIMER_IRQ, irq); @@ -59,17 +57,17 @@ /* Enable timer ints */ GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS); /* Unmask timer int */ - GALILEO_OUTL(0x100, GT_INTRMASK_OFS); + GALILEO_OUTL(GALILEO_T0EXP, GT_INTRMASK_OFS); } extern struct pci_ops gt64111_pci_ops; static struct resource cobalt_mem_resource = { - "GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM + "GT64111 PCI MEM", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM }; static struct resource cobalt_io_resource = { - "GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO + "GT64111 IO MEM", 0x00001000UL, GT64111_IO_END - GT64111_IO_BASE, IORESOURCE_IO }; static struct resource cobalt_io_resources[] = { @@ -87,10 +85,10 @@ .mem_resource = &cobalt_mem_resource, .mem_offset = 0, .io_resource = &cobalt_io_resource, - .io_offset = 0x00001000UL - GT64111_IO_BASE + .io_offset = 0 - GT64111_IO_BASE }; -static void __init cobalt_setup(void) +static int __init cobalt_setup(void) { unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); int i; @@ -103,6 +101,9 @@ set_io_port_base(KSEG1ADDR(GT64111_IO_BASE)); + /* IO region should cover all Galileo IO */ + ioport_resource.end = 0x0fffffff; + /* * This is a prom style console. We just poke at the * UART to make it talk. @@ -121,27 +122,112 @@ cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); + printk("Cobalt board ID: %d\n", cobalt_board_id); + #ifdef CONFIG_PCI register_pci_controller(&cobalt_pci_controller); #endif + + return 0; } early_initcall(cobalt_setup); +#ifdef CONFIG_BLK_DEV_INITRD + +static int __init initrd_setup(unsigned long memsz) +{ + extern unsigned long initrd_start, initrd_end; + extern char __rd_start, __rd_end; + + unsigned long start, size, phys; + char *ptr; + + if (!memcmp(arcs_cmdline, "initrd=", 7)) + ptr = arcs_cmdline; + else { + ptr = strstr(arcs_cmdline, " initrd="); + if (!ptr) + return 0; + ++ptr; + } + + size = simple_strtoul(ptr + 7, &ptr, 16); + if (*ptr != '@') + goto invalid; + + start = simple_strtoul(ptr + 1, &ptr, 16); + if (*ptr && *ptr != ' ') + goto invalid; + + phys = CPHYSADDR(start); + if (phys + size > memsz) { +invalid: + printk(KERN_WARNING "initrd: command line parameter invalid\n"); + return 0; + } + + if (!size) + return 0; + + /* an embedded ramdisk overrides us (arch/mips/kernel/setup.c) */ + + if (&__rd_start != &__rd_end) { + printk(KERN_WARNING "initrd: overridden by embedded ramdisk\n"); + return 0; + } + + initrd_start = start; + initrd_end = start + size; + + add_memory_region(0x0, phys, BOOT_MEM_RAM); + add_memory_region(phys, size, BOOT_MEM_RESERVED); + phys += size; + add_memory_region(phys, memsz - phys, BOOT_MEM_RAM); + + return 1; +} + +#endif /* CONFIG_BLK_DEV_INITRD */ + /* * Prom init. We read our one and only communication with the firmware. - * Grab the amount of installed memory + * Grab the amount of installed memory. + * Better boot loaders pass a command line too :-) */ void __init prom_init(void) { - int argc = fw_arg0; - - strcpy(arcs_cmdline, my_cmdline); + int narg, indx, posn, nchr; + unsigned long memsz; + char **argv; mips_machgroup = MACH_GROUP_COBALT; - add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM); + memsz = fw_arg0 & 0x7fff0000; + narg = fw_arg0 & 0xffff; + + if (narg) { + arcs_cmdline[0] = '\0'; + argv = (char **) fw_arg1; + posn = 0; + for (indx = 1; indx < narg; ++indx) { + nchr = strlen(argv[indx]); + if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline)) + break; + if (posn) + arcs_cmdline[posn++] = ' '; + strcpy(arcs_cmdline + posn, argv[indx]); + posn += nchr; + } + } + +#ifdef CONFIG_BLK_DEV_INITRD + if (!initrd_setup(memsz)) +#endif + { + add_memory_region(0x0, memsz, BOOT_MEM_RAM); + } } unsigned long __init prom_free_prom_memory(void) diff -urN linux.cvs/arch/mips/configs/cobalt_defconfig linux.pdh/arch/mips/configs/cobalt_defconfig --- linux.cvs/arch/mips/configs/cobalt_defconfig 2004-05-18 19:07:39.000000000 +0100 +++ linux.pdh/arch/mips/configs/cobalt_defconfig 2004-05-18 23:53:39.000000000 +0100 @@ -19,7 +19,7 @@ # CONFIG_SWAP=y CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set +CONFIG_POSIX_MQUEUE=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set @@ -27,7 +27,7 @@ # CONFIG_HOTPLUG is not set # CONFIG_IKCONFIG is not set CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS is not set CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_IOSCHED_NOOP=y @@ -159,8 +159,7 @@ # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_CARMEL is not set # CONFIG_BLK_DEV_RAM is not set @@ -182,14 +181,43 @@ # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_TASKFILE_IO=y +# CONFIG_IDE_TASKFILE_IO is not set # # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDEDMA is not set +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_SHARE_IRQ=y +# CONFIG_BLK_DEV_OFFBOARD is not set +# CONFIG_BLK_DEV_GENERIC is not set +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_IDEDMA_FORCED is not set +# CONFIG_IDEDMA_PCI_AUTO is not set +CONFIG_BLK_DEV_ADMA=y +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +CONFIG_BLK_DEV_VIA82CXXX=y +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_IVB is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -304,7 +332,15 @@ # # Tulip family network device support # -# CONFIG_NET_TULIP is not set +CONFIG_NET_TULIP=y +# CONFIG_DE2104X is not set +CONFIG_TULIP=y +# CONFIG_TULIP_MWI is not set +# CONFIG_TULIP_MMIO is not set +# CONFIG_TULIP_NAPI is not set +# CONFIG_DE4X5 is not set +# CONFIG_WINBOND_840 is not set +# CONFIG_DM9102 is not set # CONFIG_HP100 is not set # CONFIG_NET_PCI is not set @@ -367,10 +403,7 @@ # # Userland interfaces # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set @@ -381,11 +414,8 @@ # # CONFIG_GAMEPORT is not set CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y +# CONFIG_SERIO is not set # CONFIG_SERIO_I8042 is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set # # Input Device Drivers @@ -399,9 +429,7 @@ # # Character devices # -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y +# CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -468,13 +496,6 @@ # # -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -# CONFIG_MDA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# # Sound # # CONFIG_SOUND is not set @@ -493,15 +514,11 @@ # File systems # CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT3_FS is not set # CONFIG_JBD is not set -CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set @@ -530,7 +547,7 @@ # CONFIG_DEVFS_FS is not set CONFIG_DEVPTS_FS_XATTR=y CONFIG_DEVPTS_FS_SECURITY=y -# CONFIG_TMPFS is not set +CONFIG_TMPFS=y # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y @@ -554,15 +571,9 @@ # # Network File Systems # -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFS_FS is not set # CONFIG_NFSD is not set -CONFIG_LOCKD=y # CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set @@ -584,8 +595,8 @@ # # Kernel hacking # -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" +# CONFIG_CROSSCOMPILE is not set +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/hda2" # CONFIG_DEBUG_KERNEL is not set # @@ -601,5 +612,5 @@ # # Library routines # -# CONFIG_CRC32 is not set +CONFIG_CRC32=y # CONFIG_LIBCRC32C is not set diff -urN linux.cvs/arch/mips/kernel/setup.c linux.pdh/arch/mips/kernel/setup.c --- linux.cvs/arch/mips/kernel/setup.c 2004-02-08 14:57:04.000000000 +0000 +++ linux.pdh/arch/mips/kernel/setup.c 2004-05-18 23:53:39.000000000 +0100 @@ -359,8 +359,8 @@ if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) { printk("initrd extends beyond end of memory " - "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n", - sizeof(long) * 2, CPHYSADDR(initrd_end), + "(0x%0*lx > 0x%0*lx)\ndisabling initrd\n", + sizeof(long) * 2, (unsigned long) CPHYSADDR(initrd_end), sizeof(long) * 2, PFN_PHYS(max_low_pfn)); initrd_start = initrd_end = 0; } diff -urN linux.cvs/arch/mips/lib-32/dump_tlb.c linux.pdh/arch/mips/lib-32/dump_tlb.c --- linux.cvs/arch/mips/lib-32/dump_tlb.c 2004-02-11 15:05:41.000000000 +0000 +++ linux.pdh/arch/mips/lib-32/dump_tlb.c 2004-05-18 23:53:39.000000000 +0100 @@ -32,6 +32,7 @@ case PM_256M: return "256Mb"; #endif } + return "???"; } #define BARRIER() \ diff -urN linux.cvs/arch/mips/pci/fixup-cobalt.c linux.pdh/arch/mips/pci/fixup-cobalt.c --- linux.cvs/arch/mips/pci/fixup-cobalt.c 2003-11-15 10:47:57.000000000 +0000 +++ linux.pdh/arch/mips/pci/fixup-cobalt.c 2004-05-18 23:53:40.000000000 +0100 @@ -44,6 +44,7 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) { unsigned short galileo_id; + int i; /* Fix PCI latency-timer and cache-line-size values in Galileo * host bridge. @@ -52,6 +53,13 @@ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); /* + * The code described by the comment below has been removed + * as it causes bus mastering by the Ethernet controllers + * to break under any kind of network load. We always set + * the retry timeouts to their maximum. + * + * --x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x-- + * * On all machines prior to Q2, we had the STOP line disconnected * from Galileo to VIA on PCI. The new Galileo does not function * correctly unless we have it connected. @@ -61,24 +69,39 @@ */ pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id); galileo_id &= 0xff; /* mask off class info */ + + printk("Galileo ID: %u\n", galileo_id); + +#if 0 if (galileo_id >= 0x10) { /* New Galileo, assumes PCI stop line to VIA is connected. */ GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS); - } else if (galileo_id == 0x1 || galileo_id == 0x2) { + } else if (galileo_id == 0x1 || galileo_id == 0x2) +#endif + { signed int timeo; /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */ timeo = GALILEO_INL(GT_PCI0_TOR_OFS); /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */ GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS); } + + /* + * hide Galileo from the kernel's PCI resource assignment. The BARs + * on Galileo will already have been set up by the boot loader to + * match the DRAM configuration so we don't want them being monkeyed + * around with. + */ + for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) + dev->resource[i].start = dev->resource[i].end = dev->resource[i].flags = 0; } struct pci_fixup pcibios_fixups[] __initdata = { {PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, qube_raq_via_bmIDE_fixup}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_GALILEO, PCI_ANY_ID, + {PCI_FIXUP_HEADER, PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, qube_raq_galileo_fixup}, - 0 + {0} }; static char irq_tab_cobalt[] __initdata = { diff -urN linux.cvs/arch/mips/pci/pci.c linux.pdh/arch/mips/pci/pci.c --- linux.cvs/arch/mips/pci/pci.c 2004-01-19 16:28:13.000000000 +0000 +++ linux.pdh/arch/mips/pci/pci.c 2004-05-18 23:53:40.000000000 +0100 @@ -234,6 +234,8 @@ unsigned long offset; int i; + offset = 0; + for (i = 0; i < PCI_NUM_RESOURCES; i++) { if (!dev->resource[i].start) continue; diff -urN linux.cvs/drivers/char/lcd.c linux.pdh/drivers/char/lcd.c --- linux.cvs/drivers/char/lcd.c 2003-12-20 13:29:39.000000000 +0000 +++ linux.pdh/drivers/char/lcd.c 2004-05-18 23:53:40.000000000 +0100 @@ -526,7 +526,7 @@ static int lcd_waiters = 0; -static long lcd_read(struct inode *inode, struct file *file, char *buf, unsigned long count) +static ssize_t lcd_read(struct file *file, char *buf, size_t count, loff_t *pos) { long buttons_now; diff -urN linux.cvs/drivers/net/tulip/eeprom.c linux.pdh/drivers/net/tulip/eeprom.c --- linux.cvs/drivers/net/tulip/eeprom.c 2004-04-13 17:40:17.000000000 +0100 +++ linux.pdh/drivers/net/tulip/eeprom.c 2004-05-18 23:53:40.000000000 +0100 @@ -62,6 +62,22 @@ */ { 0x1e00, 0x0000, 0x000b, 0x8f01, 0x0103, 0x0300, 0x0821, 0x000, 0x0001, 0x0000, 0x01e1 } }, + {"Cobalt Microserver", 0, 0x10, 0xE0, {0x1e00, /* 0 == controller #, 1e == offset */ + 0x0000, /* 0 == high offset, 0 == gap */ + 0x0800, /* Default Autoselect */ + 0x8001, /* 1 leaf, extended type, bogus len */ + 0x0003, /* Type 3 (MII), PHY #0 */ + 0x0400, /* 0 init instr, 4 reset instr */ + 0x0801, /* Set control mode, GP0 output */ + 0x0000, /* Drive GP0 Low (RST is active low) */ + 0x0800, /* control mode, GP0 input (undriven) */ + 0x0000, /* clear control mode */ + 0x7800, /* 100TX FDX + HDX, 10bT FDX + HDX */ + 0x01e0, /* Advertise all above */ + 0x5000, /* FDX all above */ + 0x1800, /* Set fast TTM in 100bt modes */ + 0x0000, /* PHY cannot be unplugged */ + }}, {0, 0, 0, 0, {}}}; diff -urN linux.cvs/drivers/net/tulip/media.c linux.pdh/drivers/net/tulip/media.c --- linux.cvs/drivers/net/tulip/media.c 2004-04-13 17:40:17.000000000 +0100 +++ linux.pdh/drivers/net/tulip/media.c 2004-05-18 23:53:40.000000000 +0100 @@ -363,6 +363,9 @@ } tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0); + + udelay(1000); + return; } diff -urN linux.cvs/drivers/net/tulip/tulip_core.c linux.pdh/drivers/net/tulip/tulip_core.c --- linux.cvs/drivers/net/tulip/tulip_core.c 2004-05-18 19:07:47.000000000 +0100 +++ linux.pdh/drivers/net/tulip/tulip_core.c 2004-05-18 23:53:40.000000000 +0100 @@ -1484,8 +1484,8 @@ (PCI_SLOT(pdev->devfn) == 12))) { /* Cobalt MAC address in first EEPROM locations. */ sa_offset = 0; - /* No media table either */ - tp->flags &= ~HAS_MEDIA_TABLE; + /* Ensure our media table fixup get's applied */ + memcpy(ee_data + 16, ee_data, 8); } #endif #ifdef __hppa__ diff -urN linux.cvs/include/asm-mips/cobalt/cobalt.h linux.pdh/include/asm-mips/cobalt/cobalt.h --- linux.cvs/include/asm-mips/cobalt/cobalt.h 2003-11-13 16:56:16.000000000 +0000 +++ linux.pdh/include/asm-mips/cobalt/cobalt.h 2004-05-18 23:53:40.000000000 +0100 @@ -19,7 +19,10 @@ * 9 - PCI * 14 - IDE0 * 15 - IDE1 - * + */ +#define COBALT_QUBE_SLOT_IRQ 9 + +/* * CPU IRQs are 16 ... 23 */ #define COBALT_TIMER_IRQ 18 @@ -30,7 +33,6 @@ #define COBALT_SERIAL_IRQ 21 #define COBALT_SCSI_IRQ 21 #define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */ -#define COBALT_QUBE_SLOT_IRQ 23 /* * PCI configuration space manifest constants. These are wired into @@ -69,13 +71,16 @@ * Most of this really should go into a separate GT64111 header file. */ #define GT64111_IO_BASE 0x10000000UL +#define GT64111_IO_END 0x11ffffffUL +#define GT64111_MEM_BASE 0x12000000UL +#define GT64111_MEM_END 0x13ffffffUL #define GT64111_BASE 0x14000000UL -#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs)) +#define GALILEO_REG(ofs) (KSEG1 + GT64111_BASE + (unsigned long)(ofs)) #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) #define GALILEO_OUTL(val, port) \ do { \ - *(volatile unsigned int *) GALILEO_REG(port) = (port); \ + *(volatile unsigned int *) GALILEO_REG(port) = (val); \ } while (0) #define GALILEO_T0EXP 0x0100 diff -urN linux.cvs/include/asm-mips/cobalt/ide.h linux.pdh/include/asm-mips/cobalt/ide.h --- linux.cvs/include/asm-mips/cobalt/ide.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.pdh/include/asm-mips/cobalt/ide.h 2004-05-18 23:53:40.000000000 +0100 @@ -0,0 +1,69 @@ + +/* + * PIO "in" transfers can cause D-cache lines to be allocated + * to the data being read. If the target is the page cache then + * the kernel can create a user space mapping of the same page + * without flushing it from the D-cache. This has large potential + * to create cache aliases. The Cobalts seem to trigger this + * problem easily. + * + * MIPs doesn't have a flush_dcache_range() so we roll + * our own. + * + * -- pdh + */ + +#include + +static inline void __flush_dcache(void) +{ + unsigned long dc_size, dc_line, addr, end; + + dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit; + dc_line = current_cpu_data.dcache.linesz; + + addr = KSEG0; + end = addr + dc_size; + + for (; addr < end; addr += dc_line) + flush_dcache_line_indexed(addr); +} + +static inline void __flush_dcache_range(unsigned long start, unsigned long end) +{ + unsigned long dc_size, dc_line, addr; + + dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit; + dc_line = current_cpu_data.dcache.linesz; + + addr = start & ~(dc_line - 1); + end += dc_line - 1; + + if (end - addr < dc_size) + for (; addr < end; addr += dc_line) + flush_dcache_line(addr); + else + __flush_dcache(); +} + +static inline void __ide_insw(unsigned long port, void *addr, unsigned int count) +{ + __insw(port, addr, count); + + __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 2); +} + +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count) +{ + __insl(port, addr, count); + + __flush_dcache_range((unsigned long) addr, (unsigned long) addr + count * 4); +} + +#undef insw +#undef insl + +#define insw(p,a,n) __ide_insw((p),(a),(n)) +#define insl(p,a,n) __ide_insl((p),(a),(n)) + +#include diff -urN linux.cvs/include/asm-mips/cobalt/mach-gt64120.h linux.pdh/include/asm-mips/cobalt/mach-gt64120.h --- linux.cvs/include/asm-mips/cobalt/mach-gt64120.h 1970-01-01 01:00:00.000000000 +0100 +++ linux.pdh/include/asm-mips/cobalt/mach-gt64120.h 2004-05-18 23:53:40.000000000 +0100 @@ -0,0 +1 @@ +/* there's something here ... in the dark */ diff -urN linux.cvs/include/asm-mips/pci.h linux.pdh/include/asm-mips/pci.h --- linux.cvs/include/asm-mips/pci.h 2004-04-13 17:40:22.000000000 +0100 +++ linux.pdh/include/asm-mips/pci.h 2004-05-18 23:53:40.000000000 +0100 @@ -11,6 +11,9 @@ #ifdef __KERNEL__ +extern void pcibios_resource_to_bus(struct pci_dev *dev, + struct pci_bus_region *region, struct resource *res); + /* Can be used to override the logic in pci_scan_bus for skipping already-configured bus numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the loader */ diff -urN linux.cvs/include/asm-mips/pgtable-32.h linux.pdh/include/asm-mips/pgtable-32.h --- linux.cvs/include/asm-mips/pgtable-32.h 2004-03-11 16:46:57.000000000 +0000 +++ linux.pdh/include/asm-mips/pgtable-32.h 2004-05-18 23:53:40.000000000 +0100 @@ -203,14 +203,18 @@ /* Swap entries must have VALID and GLOBAL bits cleared. */ #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) -#define __swp_type(x) (((x).val >> 1) & 0x7f) -#define __swp_offset(x) ((x).val >> 10) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 10) }) +/* offset is limited to 17 bits (512MB @ 4K page) */ +/* VALID & GLOBAL are bits 9 & 8 */ +#define __swp_type(x) (((x).val >> 10) & 0x1f) +#define __swp_offset(x) ((x).val >> 15) +#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 10) | ((offset) << 15) }) #else -#define __swp_type(x) (((x).val >> 1) & 0x1f) -#define __swp_offset(x) ((x).val >> 8) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) +/* offset is limited to 19 bits (2GB @ 4K page) */ +/* VALID & GLOBAL are bits 7 & 6 */ +#define __swp_type(x) (((x).val >> 8) & 0x1f) +#define __swp_offset(x) ((x).val >> 13) +#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) #endif #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) diff -urN linux.cvs/init/do_mounts_initrd.c linux.pdh/init/do_mounts_initrd.c --- linux.cvs/init/do_mounts_initrd.c 2004-04-13 17:40:23.000000000 +0100 +++ linux.pdh/init/do_mounts_initrd.c 2004-05-18 23:53:40.000000000 +0100 @@ -1,4 +1,5 @@ #define __KERNEL_SYSCALLS__ +#include #include #include #include